CSCI E-93: Application Note 1

Dealing with Altera DE2 Current Strength and Slew Rate
------------------------------------------------------

Some output pins of the FPGA on the DE2 may produce the following
warning:

  Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O
  Assignment Warnings report for details

The I/O Assignment Warnings report is accessed by following these menus:
  Processing -> Compilation Report
    then
  Fitter -> Resource Section -> I/O Standards Section -> I/O Assignment Warnings

For example, buttonToLED will produce this warning even though pin
assignments were made in the .vhd (for a DE2-115) file using:

  attribute chip_pin: string;
  attribute chip_pin of led1: signal is "H15";
  attribute chip_pin of led2: signal is "G16";
  attribute chip_pin of pb1: signal is "R24";
  attribute chip_pin of pb2: signal is "N21";

This is because the warning was caused by issues with the default
Current Strength and Slew Rate.

For some information, see:

https://community.altera.com/kb/knowledge-base/is-it-safe-to-ignore-incomplete-io-assignment-warning-messages-in-the-quartus-ii/340684
"Is it safe to ignore incomplete I/O assignment warning messages in
the Quartus II software for Active Parallel configuration pins?"


Description

Yes, it is safe to ignore incomplete I/O assignment warning messages
in the Quartus II software, for dual purpose configuration pins that
are used for Active Parallel (AP) configuration.

The current strength and slew rate assignments on these AP
configuration pins should be left to default, but this will result in
the generation of incomplete I/O assignment warning messages by the
Quartus II software related to missing drive strength and slew rate
assignments.


Resolution

To prevent the warning messages being generated, use the following QSF
assignment for the appropriate pins:

set_instance_assignment -name  <parameter> DEFAULT -to <pin_name>

example:

set_instance_assignment -name CURRENT_STRENGTH_NEW DEFAULT -to flash_data[0]